A transistor, such as a FinFET transistor, comprises a source region, a drain region, and a channel region between the source region and the drain region. The transistor comprises a gate region that controls the channel region to operate the transistor. The gate region can be formed around one or more surfaces of the channel region, which provides the gate region with increased control over the channel region because the transistor can be controlled by a 3D gate area, as opposed to being controlled merely by a 2D gate area associated with a 2D planar transistor.